With the development of the semiconductor manufacturing technology, technical nodes have consistently decreased, thus a gate-last process has been widely used to obtain an ideal threshold voltage to improve the device performance. However, when the critical dimension (CD) is further reduced, the structures of conventional MOS field effect transistors (MOSFETs) are unable to match requirements of the device performance even the gate-last process is used to form MOSFETs. Fin field-effect transistors (FinFET) have attracted extensive attentions because they may substitute the conventional devices.
FIG. 1 illustrates an existing FinFET. As show in FIG. 1, the FinFET includes a semiconductor substrate 10 and a protruding fin 14 on the semiconductor substrate 10. The fin 14 may be formed by etching the semiconductor substrate 10. The FinFET also includes a plurality of insulation structures 11 covering a surface of the semiconductor substrate 10 and a portion of side surfaces of the fin 14 and a gate structure 12 stretching across the fin 14; and covering the top and side surfaces of the fin 14. The gate structure 12 includes a gate dielectric layer 13 and the gate electrode 15 on the gate dielectric layer 13.
When the FinFET is used, a bias control voltage may be applied on the semiconductor substrate 10 to adjusting the threshold voltage of the FinFET. However, it may be difficult to use such method to adjust the threshold voltage of the FinFET. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.